1. Field of the Invention
The present invention relates to a silicon-on-insulator (SOI) substrate, a fabricating method thereof, and a method for fabricating a floating structure using the same.
2. Description of the Related Art
Recently, high-speed chip fabrication technology using a silicon-on-insulator (SOI) substrate has made rapid progress in the area of semiconductor processing technology with respect to fabrication of high-integration memory over 1G DRAM and a high-performance microprocessor. According to SOI technology, an insulation film is coated on a silicon substrate which is an element of a semiconductor and a silicon thin film is formed thereon to prevent electron leakage and enhance integration level. Therefore, SOI technology is used in superfine processing.
Among SOI technologies, a silicon-on-sapphire (SOS) technology of forming silicon (Si) on a single-crystal sapphire substrate by heteroepitaxial chemical vapor deposition (CVD) is well known as an advanced technique. Nevertheless, it is difficult to put SOI technology to practical use due to several problems. For example, many crystalline imperfections are generated by lattice mismatch at an interface between the Si layer and the sapphire substrate, aluminum constituting the sapphire substrate mixes into the Si layer, the substrate is expensive, and large-area substrates are difficult to implement.
Recently, there have been attempts to achieve a SOI structure without use of a sapphire substrate. The attempts mainly include two methods.
The first method involves oxidizing a surface of the Si single-crystal substrate and forming a window in the oxide layer to partly expose the Si substrate. The Si single-crystal is horizontally and epitaxially grown using the exposed portion as a seed to form a Si single-crystal layer on the oxide layer.
The second method uses a Si single-crystal substrate as an activator layer and forms an oxide layer thereunder. This technique may be achieved by bonding a single-crystal Si substrate onto a dedicated single-crystal Si substrate which is thermally oxidized by heat treatment or by use of an adhesive, thereby implementing a SOI structure.
FIG. 1 is a sectional view showing a conventional SOI substrate in which an etching hole is formed in a reactive ion etching chamber. FIG. 2 is an enlarged view of a part “I” of FIG. 1.
Referring to FIGS. 1 and 2, SOI substrate 10 comprises a lower silicon substrate 11, an oxide layer 13 and a silicon layer 15 laminated in order.
The silicon layer 15 has an etching hole 15a for obtaining a predetermined pattern using an etching device. For example, a reactive ion etching (RIE) device may be used as the etching device.
Such an etching device has upper and lower electrodes 23 and 25 arranged in a processing chamber 21, and the SOI substrate 10 is set on the lower electrode 23. A gas plasma is induced by applying a high-frequency voltage to one of the upper and the lower electrodes 23 and 25 and supplying a reactive gas to the processing chamber 21. A plasma ion, accelerated by an electric field generated between the upper and the lower electrodes 23 and 25 and passing through a hole of a resistance mask (not shown), forms the etching hole 15a by contacting the exposed portion of the silicon 15.
However, during the etching process, the silicon substrate 11 and the silicon layer 15 are electrically isolated by the insulating oxide layer 13, possibly causing a notch N when forming a deep etching hole by partly exposing the oxide layer 13. This is because an electric charge is focused on an interface between the etching hole 15a and the oxide layer 13.